The present invention relates to an apparatus for, and the processing of, semiconductor substrates. In particular, the invention relates to the patterning of thin films during substrate processing.
Since semiconductor devices were first introduced several decades ago, device geometries have decreased dramatically in size. During that time, integrated circuits have generally followed the two year/half-size rule (often called "Moore's Law"), meaning that the number of devices which will fit on a chip doubles every two years. Today's semiconductor fabrication plants routinely produce devices with feature sizes of 0.5 microns or even 0.35 microns, and tomorrow's plants will be producing devices with even smaller feature sizes.
A common step in the fabrication of such devices is the formation of a patterned thin film on a substrate. These films are often formed by etching away portions of a deposited blanket layer. Modern substrate processing systems employ photolithographic techniques to pattern layers. Typically, conventional photolithographic techniques first deposit photoresist or other light-sensitive material over the layer being processed. A photomask (also known simply as a mask) having transparent and opaque regions which embody the desired pattern is then positioned over the photoresist. When the mask is exposed to light, the transparent portions allow for the exposure of the photoresist in those regions, but not in the regions where the mask is opaque. The light causes a chemical reaction in exposed portions of the photoresist. A suitable chemical, chemical vapor or ion bombardment process is then used to selectively attack either the reacted or unreacted portions of the photoresist. With the remaining photoresist pattern acting as a mask, the underlying layer may then undergo further processing. For example, the layer may be doped or etched, or other processing carried out.
When patterning such thin films, it is desirable that fluctuations in line width and other critical dimensions be minimized. Errors in these dimensions can result in variations in device characteristics or open-/short-circuited devices, thereby adversely affecting device yield. Thus, as feature sizes decrease, structures must be fabricated with greater accuracy. As a result, some manufacturers now require that variations in the dimensional accuracy of patterning operations be held to within 5 percent of the dimensions specified by the designer.
Modern photolithographic techniques often involve the use of equipment known as steppers, which are used to mask and expose photoresist layers. Steppers often use monochromatic (single-wavelength) light, enabling them to produce the detailed patterns required in the fabrication of fine geometry devices. As a substrate is processed, however, the topology of the substrate's upper surface becomes progressively less planar. This uneven topology can cause reflection and refraction of the monochromatic light, resulting in exposure of some of the photoresist beneath the opaque portions of the mask. As a result, this uneven surface topology can alter the mask pattern transferred to the photoresist layer, thereby altering the desired dimensions of the structures subsequently fabricated.
One phenomenon which may result from these reflections is known as standing waves. When a photoresist layer is deposited on a reflective underlying layer and exposed to monochromatic radiation (e.g.. deep ultraviolet (UV) light), standing waves may be produced within the photoresist layer. In such a situation, the reflected light interferes with the incident light and causes a periodic variation in light intensity within the photoresist layer in the vertical direction. Standing-wave effects are usually more pronounced at the deep UV wavelengths used in modem steppers than at longer wavelengths because the surfaces of certain materials (e.g., oxide, nitride and polysilicon) tend to be more reflective at deep UV wavelengths. The existence of standing waves in the photoresist layer during exposure causes roughness in the vertical walls formed when sections of the photoresist layer are removed during patterning, which translates into variations in linewidths, spacing and other critical dimensions.
One technique helpful in achieving the necessary dimensional accuracy is the use of an antireflective coating (ARC). An ARC's optical characteristics are such that reflections occurring at inter-layer interfaces are minimized. The ARC's absorptive index is such that the amount of monochromatic light transmitted (in either direction) is minimized, thus attenuating both transmitted incident light and reflections thereof. The ARC's refractive and reflective indexes are fixed at values that cause any reflections which might still occur to be canceled.
Another phenomenon encountered in photolithography is variation in the reactivity of deposited materials with respect to the etchants used in etching a given layer. A material's reactivity with respect to another material when using a given etchant is known as the material's etch selectivity. Etch selectivity is usually denoted by a ratio of the etch rate of the material to be removed to that of the other material. A high etch selectivity is therefore often desirable because, ideally, an etchant should selectively etch only the intended areas of the layer being patterned and not erode other structures which might already exist on the substrate being processed. In other words, a material with high etch selectivity substantially resists etching during the etching of another material.
For example, high etch selectivity of a first layer with respect to a second, overlying layer is desirable when the first layer should not be etched during the patterning of the second layer, such as during the patterning of the second of two dielectric layers. High etch selectivity is desirable in such situations because the underlying layer will not be significantly eroded in areas where the second layer is completely etched away. If the first layer's etch selectivity is low, the etching operation removes not only the intended regions of the second layer, but portions of the first layer underlying those regions as well, possibly destroying the first layer's topology. While the removal of a small amount of the first layer may be expected in such situations, extremely low etch selectivity may allow the first layer to be etched away substantially, possibly rendering the affected structures inoperable.
High etch selectivity is desirable in many situations. Examples include processes for creating vias, self-aligned contacts and local interconnect structures. For example, the damascene process sometimes used in creating connections between metal layers can benefit from a layer having high etch selectivity. Damascene is a jewelry fabrication term that has been adopted in the processing of substrates to refer to a metallization process in which interconnect lines are recessed in a planar dielectric layer by patterning troughs in the dielectric layer and then filling the troughs with metal by blanketing the dielectric layer's surface with a layer of metal. Excess metal (i.e., that metal not filling the troughs) is then removed by chemical-mechanical polishing (CMP) or similar method. This is in contrast to traditional processes used to create metal interconnect lines, which usually proceed by forming metal interconnect lines over a dielectric layer and subsequently blanketing the entire structure with one or more layers of dielectric material.
One advantage of a damascene process is that the resulting surface is more planar than those surfaces created by traditional processes. Another advantage is the elimination of an etching step when defining the metal pattern. This increases the flexibility in the choice of metal composition. Dry etching of aluminum-copper alloys, for example, becomes more difficult as the copper content increases. When no etching is required, a larger amount of copper or other elements can be added to the alloy, thereby improving the metal's immunity to electromigration.
It is therefore desirable to provide a structure which avoids unwanted etching of layers underlying the layer being patterned. Additionally, the photolithography process would benefit from a technique by which such patterning might be done more accurately, such as by the use of an ARC layer. Specifically, such a layer should allow the use of a process such as the damascene process, while providing the optical qualities necessary to providing acceptable patterning accuracy.